BinaryRake

A TrueType font that collapses numeric literals into a rake ligature — a continuous bar with one tooth per bit. The four bases share the same bar pitch but pack 1 / 2 / 3 / 4 teeth per digit cell. Inside a literal, p is a downward tick (decimal-point analog) and r adds a rightward stub (repeating-fraction marker).

Binary — 1 tooth per digit

Quaternary — 2 teeth per digit

Octal — 3 teeth per digit

Hex — 4 teeth per digit

Same value, four densities — 255 in each base

Period and repeat markers

Edge cases

Realistic code — RV32I decoder, page-table flags, SHA-256 K[]

Every 0b… and 0x… is a rake; the rest is the base font (Iosevka). Toggle calt to see the underlying glyphs.

// Minimal RV32I decoder. Heavy on bit-twiddling: opcode masks and
// function codes in binary, machine code and memory addresses in hex.

const OPCODE_MASK: u32 = 0b01111111;
const FUNCT3_MASK: u32 = 0b00000111;
const FUNCT7_MASK: u32 = 0b01111111;
const REG_MASK:    u32 = 0b00011111;

const OP_LOAD:    u32 = 0b0000011;
const OP_STORE:   u32 = 0b0100011;
const OP_BRANCH:  u32 = 0b1100011;
const OP_JAL:     u32 = 0b1101111;
const OP_JALR:    u32 = 0b1100111;
const OP_OP_IMM:  u32 = 0b0010011;
const OP_OP:      u32 = 0b0110011;
const OP_LUI:     u32 = 0b0110111;
const OP_AUIPC:   u32 = 0b0010111;
const OP_SYSTEM:  u32 = 0b1110011;

const F3_ADD_SUB: u32 = 0b000;
const F3_SLL:     u32 = 0b001;
const F3_XOR:     u32 = 0b100;
const F3_OR:      u32 = 0b110;
const F3_AND:     u32 = 0b111;

const F7_ADD: u32 = 0b0000000;
const F7_SUB: u32 = 0b0100000;

// Encoded test programs (RV32I machine code)
const NOP:    u32 = 0x00000013; // addi x0, x0, 0
const RET:    u32 = 0x00008067; // jalr x0, 0(x1)
const EBREAK: u32 = 0x00100073;
const ECALL:  u32 = 0x00000073;

// QEMU virt board memory map
const RAM_BASE:    usize = 0x80000000;
const UART_BASE:   usize = 0x10000000;
const VIRTIO_BASE: usize = 0x10001000;
const CLINT_BASE:  usize = 0x02000000;
const PLIC_BASE:   usize = 0x0C000000;

// Page-table entry flags (Sv39)
const PTE_V: u64 = 0b00000001;  // valid
const PTE_R: u64 = 0b00000010;  // read
const PTE_W: u64 = 0b00000100;  // write
const PTE_X: u64 = 0b00001000;  // execute
const PTE_U: u64 = 0b00010000;  // user
const PTE_PPN_MASK: u64 = 0x003FFFFFFFFFFC00;

fn decode(insn: u32) -> Op {
    let opcode = insn & OPCODE_MASK;
    let rd     = (insn >> 0b00111) & REG_MASK;
    let funct3 = (insn >> 0b01100) & FUNCT3_MASK;
    let rs1    = (insn >> 0b01111) & REG_MASK;
    let rs2    = (insn >> 0b10100) & REG_MASK;
    let funct7 = (insn >> 0b11001) & FUNCT7_MASK;

    match opcode {
        OP_OP => match (funct3, funct7) {
            (F3_ADD_SUB, F7_ADD) => Op::Add { rd, rs1, rs2 },
            (F3_ADD_SUB, F7_SUB) => Op::Sub { rd, rs1, rs2 },
            (F3_AND,     F7_ADD) => Op::And { rd, rs1, rs2 },
            (F3_OR,      F7_ADD) => Op::Or  { rd, rs1, rs2 },
            (F3_XOR,     F7_ADD) => Op::Xor { rd, rs1, rs2 },
            _ => Op::Illegal,
        },
        OP_LUI => Op::Lui { rd, imm: insn & 0xFFFFF000 },
        OP_OP_IMM => Op::Addi { rd, rs1, imm: (insn as i32 >> 0b10100) as u32 },
        OP_SYSTEM if insn == ECALL  => Op::Ecall,
        OP_SYSTEM if insn == EBREAK => Op::Ebreak,
        _ => Op::Illegal,
    }
}

// PCI vendor IDs we care about
const VID_INTEL:    u16 = 0x8086;
const VID_AMD:      u16 = 0x1022;
const VID_NVIDIA:   u16 = 0x10DE;
const VID_REALTEK:  u16 = 0x10EC;
const VID_BROADCOM: u16 = 0x14E4;

// IPv4 private-range checks (network byte order)
fn is_private_v4(addr: u32) -> bool {
    addr & 0xFF000000 == 0x0A000000      // 10.0.0.0/8
 || addr & 0xFFF00000 == 0xAC100000      // 172.16.0.0/12
 || addr & 0xFFFF0000 == 0xC0A80000      // 192.168.0.0/16
}

// SHA-256 round constants K[0..16] — fractional parts of cube roots of primes
const K: [u32; 16] = [
    0x428A2F98, 0x71374491, 0xB5C0FBCF, 0xE9B5DBA5,
    0x3956C25B, 0x59F111F1, 0x923F82A4, 0xAB1C5ED5,
    0xD807AA98, 0x12835B01, 0x243185BE, 0x550C7DC3,
    0x72BE5D74, 0x80DEB1FE, 0x9BDC06A7, 0xC19BF174,
];